The present invention relates to a method of operating a non-volatile memory device. More particularly, the present invention relates to a method of operating a non-volatile memory device that reduces a time for discharging a precharged voltage when a program operation or a read operation is performed, thereby decreasing a total operation time of the non-volatile memory device.
A non-volatile memory device generally has a memory cell array, a row decoder and a page buffer.
The memory cell array includes word lines extended along rows, bit lines extended along columns and cell strings corresponding to the bit lines.
The non-volatile memory device further includes a voltage providing circuit for generating a voltage for program or read of data, and a controller for outputting a control signal for controlling the voltage providing circuit, the page buffer, the row decoder, etc.
The controller has a storage means, and outputs the control signal for controlling in sequence operations of the non-volatile memory device in accordance with a pre-programmed algorithm when an operation command is input.
Hereinafter, the read operation in the non-volatile memory device will be described.
When a read command is input in the non-volatile memory device, the controller detects the read command and outputs the control signal for turning on the voltage providing circuit to generate the voltage for the read operation.
The voltage providing circuit includes a pumping circuit for generating a high voltage.
A pumping operation of the voltage providing circuit is started in accordance with the control signal of the controller. An operation voltage to be applied to a word line and a bit line selected for reading data is precharged after the high voltage is generated. The read operation for reading the data is then performed.
When the read operation is finished, data stored in a selected memory cell is stored in a latch of the page buffer. The stored data is output in accordance with the control signal of the controller. In addition, the word line, the bit line and the pumping circuit precharged for the read operation are discharged.
The controller outputs a discharge control signal for discharging the word line and the bit line. The voltage precharged to the word line and the bit line is discharged in accordance with the output discharge control signal.
The controller outputs a control signal for discharging the pumping circuit by turning off the pumping circuit after the word line and the bit line are discharged.
Operations in a program operation are similar to the above precharging and discharging operations.
In the program operation, a process of discharging the bit line and the word line and a process of discharging the pumping circuit are separately performed. However, a problem exists in that a total operation time in the non-volatile memory device is increased by separately performing the processes.
The non-volatile memory device pre-stores an algorithm block needed for operation thereof in a storage means such as a ROM included in the controller, and performs the operations in accordance with an order corresponding to the algorithm block. The algorithm block is divided into sub-blocks corresponding to the operations, and a sub-block required for a specific operation is read and used.
That is, to perform the above read operation, an upper data read algorithm for reading data is started.
A lower algorithm block for performing setup of the pumping circuit for generating high voltage is read and operated. In addition, a lower algorithm block for precharging the bit line and the word line is read and operated.
Subsequently, a data read algorithm block is read and operated, and an algorithm block for storing the read data in the page buffer is read and operated.
An algorithm block for discharging the word line and the bit line is read and operated, and an algorithm block for discharging the pumping circuit by turning off the pumping circuit is read and operated. In other words, the upper data read algorithm for the read operation is finished.
Since the algorithm blocks for discharge of the lines and discharge of the pumping circuit are independently performed, the operation time in the non-volatile memory device may be increased.
The non-volatile memory device is evaluated in accordance with the storage capacity of data and read/write velocity. Accordingly, rapid operation as well as storage capacity is important.
In the non-volatile memory device, a time for discharging the voltage affects the total operation time of the non-volatile memory device. Accordingly, the total operation time is increased as the time for discharging the voltage is augmented.